With our SIL 3 and 4 expertise, we choose for a redundant hardware architecture. This not only goes for the processing platform but also for power supplies, I/O's and other circuitry. Depending on the SIL level, the software will be implemented in a double or triple redundant diverse processing system, for example using a hard-core processor, soft-core processor and the implementation using FPGA fabric. When required, scrubbing can be implemented to mitigate single event upsets and even single event latchup.
ERTMS compatible automatic train breaking:
For our customer ProRail (responsible for rail infrastructure in the Netherlands) we implemented a Track Protection System preventing having 2 trains on the same track simultaneously. Therefore, we designed a SIL 4 certified Track Control System replacing an aging infrastructure based on classic relay technology. The new implementation was based on the Xilinx Zynq 7000 series System-on-Chips (SOC). We applied secure network connectivity and 30 kV overvoltage (lightning) protection.